Lattice Nexus Platform

Enabling Low Power, High Reliability, and High Performance Design

The Lattice Nexus FPGA platform combines Lattice’s long-standing low power FPGA expertise with leading 28nm FD-SOI semiconductor manufacturing technology. With this platform Lattice is enabling the rapid development of multiple device families that deliver low power, high performance, high reliability and small form factor.

Three levels of Innovation provided by the Lattice Nexus platform

  • Circuit: 75% lower power, 100x lower soft error rate as compared with bulk process
  • Architecture: embedded large RAM blocks optimize implementation of common AI algorithums
  • Solutions: delivering more complete solutions with IP, reference designs, and software stacks

Three Levels of Innovation


  • Programmable back bias enabled by insulated gate of FD-SOI technology delivers performance/power optimization
  • Critical area (orange) size reduction provides 100x SER reliability improvement
  • FD-SOI leverages bulk CMOS process and has fewer processing steps


  • Optimized for Edge compute with embedded large RAM
  • Improves performance by avoiding off-chip memory access
  • Eliminates power consumption associated with accessing external memory


  • Solutions focus on AI, embedded vision, and security
  • Reference design, kits, soft IP, and software accelerate product development
  • Complete end to end solution offerings enable faster time to market
Like most websites, we use cookies and similar technologies to enhance your user experience. We also allow third parties to place cookies on our website. By continuing to use this website you consent to the use of cookies as described in our Cookie Policy.
辽宁彩票35选7 闲来麻将外挂 11月2日热火vs篮网全场录像 2020热门番号网 足彩进球彩 下载全民内蒙古手机麻将 可以赚钱的打麻将游戏 贵州快3 巨人财富 财富之都 福建体彩网22开奖公告 11月03日爵士vs火箭数据统计 竞彩指数即时指数 兴业证券股票行情软件 生讯网配资 快乐10分助手免费 手游麻将4人联机游戏